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HCPL-314J
0.4 Amp Output Current IGBT Gate Drive Optocoupler
Data Sheet
Lead (Pb) Free RoHS 6 fully compliant
RoHS 6 fully compliant options available; -xxxE denotes a lead-free product
Description
The HCPL-314J family of devices consists of an AlGaAsLED optically coupled to an integrated circuit with a power output stage. These optocouplers are ideally suited for driving power IGBTs and MOSFETs used in motor control inverter applications. The high operating voltage range of the output stage provides thedrivevoltagesrequiredbygatecontrolleddevices. The voltage and current supplied by this optocoupler makes it ideally suited for directly driving small or medium power IGBTs. For IGBTs with higher ratings theHCPL-3150(0.5A)orHCPL-3120(2.0A)optocouplers canbeused.
Features
* 0.4Aminimumpeakoutputcurrent * Highspeedresponse: 0.7smax.propagationdelayovertemp.range * UltrahighCMR:min.25kV/satVCM=1.5kV * Bootstrappablesupplycurrent:max.3mA * Wideoperatingtemp.range:-40Cto100C * WideVCCoperatingrange:10Vto30Vovertemp. range * AvailableinDIP8(single)andSO16(dual)package * Safetyapprovals:ULrecognized,3750Vrmsfor 1minute.CSAapproval.IEC/EN/DINEN60747-5-2 approvalVIORM=891Vpeak
Functional Diagram
N/C ANODE CATHODE 1 2 3
SHIELD
16 VCC 15 VO 14 VEE
Applications
* * * * * * IsolatedIGBT/powerMOSFETgatedrive ACandbrushlessdcmotordrives Invertersforappliances Industrialinverters SwitchModePowerSupplies(SMPS) UninterruptablePowerSupplies(UPS)
ANODE CATHODE N/C
6 7 8
SHIELD
11 VCC 10 VO 9 VEE
HCPL-314J
Selection Guide
Truth Table
LED OFF ON VO LOW HIGH
Package Type SO16
Part Number HCPL-314J
Number of Channels 2
A0.1FbypasscapacitormustbeconnectedbetweenpinsVCCandVEE.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Ordering Information
HCPL-314JisULRecognizedwith3750Vrmsfor1minuteperUL1577. Option Part number HCPL-314J RoHS Compliant -000E -500E Non RoHS Compliant No option #500 Package SO-16 Surface Mount X X X Tape & Reel IEC/EN/DIN EN 60747-5-2 Quantity X X 45 per tube 850 per reel
Toorder,chooseapartnumberfromthepartnumbercolumnandcombinewiththedesiredoptionfromtheoption columntoformanorderentry. Example1: HCPL-314J-500EtoorderproductofSO-16SurfaceMountpackageinTapeandReelpackagingwithIEC/EN/DIN EN60747-5-2SafetyApprovalinRoHScompliant. Example2: HCPL-314JtoorderproductofSO-16SurfaceMountpackageintubepackagingwithIEC/EN/DINEN60747-5-2 SafetyApprovalandnonRoHScompliant. Optiondatasheetsareavailable.ContactyourAvagosalesrepresentativeorauthorizeddistributorforinformation. Remarks:Thenotation`#XXX'isusedforexistingproducts,while(new)productslaunchedsince15thJuly2001and RoHScompliantoptionwilluse`-XXXE`.
Package Outline Drawing
HCPL-314J SO16 Package:
LAND PATTERN RECOMMENDATION TOP VIEW 16 15 14 11 10 9
GND1
VCC1
VO1
8.76 0.20 (0.345 0.008)
GND2
7.49 0.10 (0.295 0.004)
VCC2
VO2
HCPL-314J
11.63 (0.458)
VIN1
VIN2
NC
1
2
3
6
7
NC
8
V1
V2
2.16 (0.085) 0.64 (0.025) 0.10 - 0.30 (0.004 - 0.0118) STANDOFF
8.76 0.20 (0.345 0.008)
VIEW FROM PIN 16 9
0 - 8 0.64 (0.025 MIN.) 3.51 0.13 (0.138 0.005) 10.36 0.20 (0.408 0.008) 0.23 (0.0091)
VIEW FROM PIN 1
1.27 0.457 (0.050) (0.018) 0.016 0.0003 (0.406 0.007)
ALL LEADS TO BE COPLANAR 0.05 mm (0.002 INCHES) . DIMENSIONS IN MILLIMETERS AND (INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
2
Solder Reflow Thermal Profile
300
PREHEATING RATE 3C + 1C/-0.5C/SEC. REFLOW HEATING RATE 2.5C 0.5C/SEC. PEAK TEMP. 245C PEAK TEMP. 240C
Regulatory Information
The HCPL-314J has been approved bythefollowingorganizations: IEC/EN/DIN EN 60747-5-2 Approvedunder: IEC60747-5-2:1997+A1:2002 EN60747-5-2:2001+A1:2002 DINEN60747-5-2(VDE0884 Teil2):2003-01. UL ApprovalunderUL1577,component recognition program up to VISO = 3750Vrms.FileE55361. CSA ApprovedunderCSAComponentAcceptanceNotice#5,FileCA88324.
TEMPERATURE (C)
200
160C 150C 140C
PEAK TEMP. 230C
2.5C 0.5C/SEC. 30 SEC. 3C + 1C/-0.5C 30 SEC.
SOLDERING TIME 200C
100
PREHEATING TIME 150C, 90 + 30 SEC. 50 SEC. TIGHT TYPICAL LOOSE
ROOM TEMPERATURE
0
0
50
100
150
200
250
TIME (SECONDS)
Note: Non-halide flux should be used.
Recommended Pb-Free IR Profile
tp Tp TL
TEMPERATURE
TIME WITHIN 5 C of ACTUAL PEAK TEMPERATURE 20-40 SEC.
260 +0/-5 C 217 C RAMP-UP 3 C/SEC. MAX. 150 - 200 C
Tsmax Tsmin
RAMP-DOWN 6 C/SEC. MAX.
ts PREHEAT 60 to 180 SEC. 25
tL
60 to 150 SEC.
t 25 C to PEAK
TIME NOTES: THE TIME FROM 25 C to PEAK TEMPERATURE = 8 MINUTES MAX. Tsmax = 200 C, Tsmin = 150 C
Note: Non-halide flux should be used.
3
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics
Description InstallationclassificationperDINVDE0110/1.89,Table1 forratedmainsvoltage150Vrms forratedmainsvoltage300Vrms forratedmainsvoltage600Vrms Symbol

Characteristic I-IV I-IV I-III 55/100/21 2 891 1670 1336 6000
Unit
ClimaticClassification PollutionDegree(DINVDE0110/1.89) MaximumWorkingInsulationVoltage InputtoOutputTestVoltage,Methodb* VIORMx1.875=VPR,100%ProductionTestwith tm=1sec,Partialdischarge<5pC InputtoOutputTestVoltage,Methoda* VIORMx1.5=VPR,TypeandSampleTest,tm=60sec, Partialdischarge<5pC HighestAllowableOvervoltage (TransientOvervoltagetini=10sec) Safety-limitingvalues-maximumvaluesallowedinthe eventofafailure. CaseTemperature InputCurrent** OutputPower**
VIORM VPR VPR VIOTM
Vpeak Vpeak Vpeak Vpeak
PS,OUTPUT RS
TS IS,INPUT
175 400 1200 >109
C mA mW
InsulationResistanceatTS,VIO=500V
*RefertotheoptocouplersectionoftheIsolationandControlComponentsDesigner'sCatalog,underProductSafetyRegulationssection, IEC/ EN/DINEN60747-5-2,foradetaileddescriptionofMethodaandMethodbpartialdischargetestprofiles. **RefertothefollowingfigurefordependenceofPSandISonambienttemperature.
OUTPUT POWER - PS, INPUT CURRENT - IS
800 700 600 500 400 300 200 100 0 0 25 50 75 100 125 150 175 200 PS (mW) IS (mA)
TS - CASE TEMPERATURE - C
HCPL-J314
4
Insulation and Safety Related Specifications
Parameter
MinimumExternalAirGap (Clearance) MinimumExternalTracking (Creepage) MinimumInternalPlasticGap (InternalClearance) TrackingResistance (ComparativeTrackingIndex) IsolationGroup
Symbol
L(101) L(102) CTI IIIa
HCPL-314J
8.3 8.3 0.5 >175
Units
mm mm mm V
Conditions
Measuredfrominputterminalstooutput terminals,shortestdistancethroughair. Measuredfrominputterminalstooutput terminals,shortestdistancepathalongbody. Throughinsulationdistanceconductorto conductor,usuallythestraightlinedistance thicknessbetweentheemitteranddetector. DINIEC112/VDE0303Part1 MaterialGroup(DINVDE0110,1/89,Table1)
Absolute Maximum Ratings
Parameter
StorageTemperature OperatingTemperature AverageInputCurrent PeakTransientInputCurrent(<1spulse width,300pps) ReverseInputVoltage "High"PeakOutputCurrent "Low"PeakOutputCurrent SupplyVoltage OutputVoltage OutputPowerDissipation InputPowerDissipation LeadSolderTemperature SolderReflowTemperatureProfile
Symbol
TS TA IF(AVG) IF(TRAN) VR IOH(PEAK) IOL(PEAK) VCC-VEE VO(PEAK) PO PI
Min.
-55 -40 -0.5 -0.5
Max.
125 100 25 1.0 5 0.6 0.6 35 VCC 260 105
Units
C C mA A V A A V V mW mW
Note
1
2 2
3 4
260Cfor10sec.,1.6mmbelowseatingplane SeePackage Outline Drawingssection
Recommended Operating Conditions
Parameter PowerSupply
InputCurrent(ON) InputVoltage(OFF) OperatingTemperature
Symbol
VCC -VEE IF(ON) VF(OFF) TA
Min.
10 8 -3.6 -40
Max.
30 12 0.8 100
Units
V mA V C
Note
5
Electrical Specifications (DC)
Overrecommendedoperatingconditionsunlessotherwisespecified. Parameter
HighLevelOutputCurrent LowLevelOutputCurrent HighLevelOutputVoltage LowLevelOutputVoltage HighLevelSupplyCurrent LowLevelSupplyCurrent ThresholdInputCurrent LowtoHigh ThresholdInputVoltage HightoLow InputForwardVoltage TemperatureCoefficientof InputForwardVoltage InputReverseBreakdown Voltage InputCapacitance
Symbol
IOH IOL VOH VOL ICCH ICCL IFLH VFHL VF VF/TA BVR CIN
Min.
0.2 0.4 0.2 0.4 VCC-4 0.8 1.2 3
Typ.
0.5 0.4 0.5 VCC-1.8 0.4 0.7 1.2 1.5 -1.2 10
Max.
1 3 3 5 1.8
Units
A A V V mA mA mA V V mV/C V pF
Test Conditions
Vo=VCC-4 Vo=VCC-10 Vo=VEE+2.5 Vo=VEE+10 Io=-100mA Io=100mA Io=0mA Io=0mA Io=0mA, Vo>5V
Fig.
2 3 5 6 1 4 7,8 9,15
Note
5 2 5 2 6,7 15
IF=10mA
16
IR=100A f=1MHz, VF=0V
Switching Specifications (AC)
Overrecommendedoperatingconditionsunlessotherwisespecified. Parameter
PropagationDelayTimeto HighOutputLevel PropagationDelayTimeto LowOutputLevel PropagationDelay DifferenceBetweenAny TwoPartsorChannels RiseTime FallTime OutputHighLevelCommon ModeTransientImmunity OutputLowLevelCommon ModeTransientImmunity
Symbol
tPLH tPHL PDD tR tF |CMH| |CML|
Min.
0.1 0.1 -0.5 25 25
Typ.
0.2 0.3 35 35
Max.
0.7 0.7 0.5
Units
s s s ns ns kV/s kV/s
Test Conditions
Rg=47, Cg=3nF, f=10kHz, DutyCycle= 50%, IF=8mA, VCC=30V TA=25C, VCM=1.5kV
Fig.
10,11, 12,13, 14,17 18 18
Note
14
10
11, 12 11, 13
6
Package Characteristics
Foreachchannelunlessotherwisespecified. Parameter
Input-OutputMomentary WithstandVoltage Output-OutputMomentary WithstandVoltage Input-OutputResistance Input-OutputCapacitance
Symbol
VISO VO-O RI-O CI-O
Min.
3750 1500
Typ.
1012 1.2
Max.

Units
Vrms Vrms pF
Test Conditions
TA=25C, RH<50% for1min. VI-O=500V Freq=1MHz
Fig.

Note
8,9 16 9
Notes: 1. Deratelinearlyabove70Cfreeairtemperatureatarateof0.3mA/C. 2. Maximumpulsewidth=10s,maximumdutycycle=0.2%.ThisvalueisintendedtoallowforcomponenttolerancesfordesignswithIO peakminimum=0.4A.SeeApplicationsectionforadditionaldetailsonlimitingIOLpeak. 3. Deratelinearlyabove85C,freeairtemperatureattherateof4.0mW/C. 4. Inputpowerdissipationdoesnotrequirederating. 5. Maximumpulsewidth=50s,maximumdutycycle=0.5%. 6. Inthistest,VOHismeasuredwithaDCloadcurrent.WhendrivingcapacitiveloadVOHwillapproachVCCasIOHapproacheszeroamps. 7. Maximumpulsewidth=1ms,maximumdutycycle=20%. 8. InaccordancewithUL1577,eachHCPL-314Joptocouplerisprooftestedbyapplyinganinsulationtestvoltage5000Vrmsfor1second (leakagedetectioncurrentlimitII-O5A).Thistestisperformedbefore100%productiontestforpartialdischarge(methodB)showninthe IEC/EN/DINEN60747-5-2InsulationCharacteristicsTable,ifapplicable. 9. Deviceconsideredatwo-terminaldevice:pinsoninputsideshortedtogetherandpinsonoutputsideshortedtogether. 10. PDDisthedifferencebetweentPHLandtPLHbetweenanytwopartsorchannelsunderthesametestconditions. 11. Pins3and4(HCPL-314J)needtobeconnectedtoLEDcommon. 12. Commonmodetransientimmunityinthehighstateisthemaximumtolerable|dVcm/dt|ofthecommonmodepulseVCMtoassurethatthe outputwillremaininthehighstate(i.e.Vo>6.0V). 13. Commonmodetransientimmunityinalowstateisthemaximumtolerable|dVCM/dt|ofthecommonmodepulse,VCM,toassurethatthe outputwillremaininalowstate(i.e.Vo<1.0V). 14. Thisloadconditionapproximatesthegateloadofa1200V/25AIGBT. 15. Foreachchannel.ThepowersupplycurrentincreaseswhenoperatingfrequencyandQgofthedrivenIGBTincreases. 16. Deviceconsideredatwoterminaldevice:Channeloneoutputsidepinsshortedtogether,andchanneltwooutputsidepinsshortedtogether.
7
(VOH-VCC) - HIGH OUTPUT VOLTAGE DROP - V
0
IOH - OUTPUT HIGH CURRENT - A
0.40 0.38 0.36 0.34 0.32 0.30 -50
(VOH-VCC) - OUTPUT HIGH VOLTAGE DROP - V
0 -1 -2 -3 -4 -5 -6 VOH
-0.5 -1.0 -1.5 -2.0 -2.5 -50
-25
0
25
50
75
100 125
-25
0
25
50
75
100 125
0
0.2
0.4
0.6
TA - TEMPERATURE - C
TA - TEMPERATURE - C
IOH - OUTPUT HIGH CURRENT - A
Figure 1. VOH vs. Temperature.
HCPL-J314 fig 01
Figure 2. IOH vs. Temperature.
HCPL-J314 fig 02
Figure 3. VOH vs. IOH.
HCPL-J314 fig 03
0.44
VOL - OUTPUT LOW VOLTAGE - V IOL - OUTPUT LOW CURRENT - A
0.470 0.465 0.460 0.455 0.450 0.445 0.440 -50
25 VOL - OUTPUT LOW VOLTAGE - V
-25 0 25 50 75 100 125
0.43 0.42 0.41 0.40 0.39 -50
20 15 10 5 0
-25
0
25
50
75
100 125
0
100 200 300 400 500 600 700 IOL - OUTPUT LOW CURRENT - mA
TA - TEMPERATURE - C
TA - TEMPERATURE - C
Figure 4. VOL vs. Temperature.
HCPL-J314 fig 04
Figure 5. IOL vs. Temperature.
HCPL-J314 fig 05
Figure 6. VOL vs. IOL.
HCPL-J314 fig 06
IFLH - LOW TO HIGH CURRENT THRESHOLD - mA
1.4
ICC - SUPPLY CURRENT - mA
1.2
ICC - SUPPLY CURRENT - mA
3.5
1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 ICCL ICCH 100 125
1.0 0.8 0.6 0.4 0.2 0 10 ICCL ICCH 15 20 25 30
3.0
2.5
2.0
1.5 -50
-25
0
25
50
75
100 125
TA - TEMPERATURE - C
VCC - SUPPLY VOLTAGE - V
TA - TEMPERATURE - C
Figure 7. ICC vs. Temperature.
HCPL-J314 fig 07
Figure 8. ICC vs. VCC.
HCPL-J314 fig 08
Figure 9. IFLH vs. Temperature.
HCPL-J314 fig 09
8
400
TP - PROPAGATION DELAY - ns TP - PROPAGATION DELAY - ns
400 TP - PROPAGATION DELAY - ns
500 400 300 200 100 0 -50
300
300
200
200
100 TPLH TPHL 15 20 25 30
100
TPLH TPHL -25 0 25 50 75 100 125
0 10
0
6
9
12
15
18
VCC - SUPPLY VOLTAGE - V
IF - FORWARD LED CURRENT - mA
TA - TEMPERATURE - C
Figure 10. Propagation Delay vs. VCC.
HCPL-J314 fig 10
Figure 11. Propagation Delay vs. IF.
HCPL-J314 fig 11
Figure 12. Propagation Delay vs. Temperature.
HCPL-J314 fig 12
400
TP - PROPAGATION DELAY - ns TP - PROPAGATION DELAY - ns
400
VO - OUTPUT VOLTAGE - V
35 30 25 20 15 10 5 0 -5 0 1 2 3 4 5 6
350
300
300
TPLH TPHL
200
250
100 TPLH TPHL 0 20 40 60 80 100
200
0
50
100
150
200
0
Rg - SERIES LOAD RESISTANCE -
Cg - LOAD CAPACITANCE - nF
IF - FORWARD LED CURRENT - mA
Figure 13. Propagation Delay vs. Rg.
HCPL-J314 fig 13
Figure 14. Propagation Delay vs. Cg.
HCPL-J314 fig 14
Figure 15. Transfer Characteristics.
HCPL-J314 fig 15
25
IF - FORWARD CURRENT - mA
20 15 10 5 0 1.2
1.4
1.6
1.8
VF - FORWARD VOLTAGE - V
Figure 16. Input Current vs. Forward Voltage.
HCPL-J314 fig 16
9
1 IF = 7 to 16 mA + 10 KHz - 500 2
8 0.1 F 7 VO + - VCC = 15 to 30 V IF tr tf 90% 50% VOUT tPLH tPHL 10%
50% DUTY CYCLE
3
6
47 3 nF
4
5
Figure 17. Propagation Delay Test Circuit and Waveforms.
VCM IF 1 A B 2 7 VO 3 6 + - VCC = 30 V VO SWITCH AT A: IF = 10 mA VO SWITCH AT B: IF = 0 mA + VCM = 1500 V - VOL 8 0.1 F 0V t VOH V t = VCM t
5V
+ -
4
5
Figure 18. CMR Test Circuit and Waveforms.
10
Applications Information
Eliminating Negative IGBT Gate Drive TokeeptheIGBTfirmlyoff,theHCPL-314Jhasaverylow maximumVOLspecificationof1.0V.MinimizingRgand theleadinductancefromtheHCPL-314JtotheIGBTgate andemitter(possiblybymountingtheHCPL-314Jona smallPCboarddirectlyabovetheIGBT)caneliminatethe needfornegativeIGBTgatedriveinmanyapplications asshowninFigure19.Careshouldbetakenwithsuch aPCboarddesigntoavoidroutingtheIGBTcollectoror emittertracesclosetotheHCPL-314Jinputasthiscan resultinunwantedcouplingoftransientsignalsintothe inputofHCPL-314Janddegradeperformance.(IftheIGBT drainmustberoutedneartheHCPL-314Jinput,thenthe LED should be reverse biased when in the off state, to preventthetransientsignalscoupledfromtheIGBTdrain fromturningontheHCPL-314J.)Anexternalclampdiode maybeconnectedbetweenpins14&15andpins9&10 (asshowninFigure19)fortheprotectionofHCPL-314J inthecaseofIGBTsswitchinginductiveload.
+5 V CONTROL INPUT 74XX OPEN COLLECTOR 270 1
HCPL-314J 16 0.1 F 2 15 + -
FLOATING SUPPLY VCC = 18 V
+ HVDC
Rg
VOL
3 GND 1
14
3-PHASE AC
6 11 0.1 F 7 10 + - VCC = 18 V
+5 V 270
CONTROL INPUT 74XX OPEN COLLECTOR
Rg
8 GND 1
9
- HVDC
Figure 19. Recommended LED Drive and Application Circuit for HCPL-314J.
11
Esw - ENERGY PER SWITCHING CYCLE - J
Selecting the Gate Resistor (Rg) Step 1:CalculateRgminimumfromtheIOLpeakspecification.TheIGBTandRg inFigure24canbeanalyzedasasimpleRCcircuitwithavoltagesuppliedby theHCPL-314J. V - VOL Rg CC IOLPEAK 24V-5V = 0.6A =32 TheVOLvalueof5VinthepreviousequationistheVOLatthepeakcurrentof 0.6A.(SeeFigure6). Step 2:ChecktheHCPL-314JpowerdissipationandincreaseRgifnecessary. TheHCPL-314Jtotalpowerdissipation(PT )isequaltothesumoftheemitter power(PE)andtheoutputpower(PO). PT = PE + PO PE = IF * VF * Duty Cycle PO = PO(BIAS) + PO(SWITCHING) = ICC * VCC + ESW (Rg,Qg)* f =(ICCBIAS+KICC * Qg * f) * VCC+ESW(Rg,Qg) * f whereKICC * Qg * fistheincreaseinICCduetoswitchingandKICC isaconstant of0.001mA/(nC*kHz).ForthecircuitinFigure19withIF(worstcase)=10 mA,Rg=32,MaxDutyCycle=80%,Qg=100nC,f=20kHzandTAMAX= 85C: PE =10mA * 1.8V* 0.8=14mW PO=(3mA+(0.001mA/(nC * kHz))* 20kHz* 100nC)* 24V+0.4J* 20kHz =128mW <260mW (PO(MAX)@85C) Thevalueof3mAforICCinthepreviousequationisthemax.ICCoverentire operatingtemperaturerange. SincePOforthiscaseislessthanPO(MAX),Rg=32isalrightforthepower dissipation.
4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 20 40 60 80 100 Qg = 50 nC Qg = 100 nC Qg = 200 nC Qg = 400 nC
Rg - GATE RESISTANCE -
Figure 20. Energy Dissipated in the HCPL-314J and for Each IGBT Switching Cycle.
LED Drive Circuit Considerations for Ultra High CMR Performance Without a detector shield, the dominantcauseofoptocouplerCMR failure is capacitive coupling from the input side of the optocoupler, throughthepackage,tothedetector ICasshowninFigure21.TheHCPL314JimprovesCMRperformanceby usingadetectorICwithanoptically transparent Faraday shield, which diverts the capacitively coupled current away from the sensitive IC circuitry. However, this shield does noteliminatethecapacitivecoupling between the LED and optocoupler pins 5-8 as shown in Figure 22. This capacitive coupling causes perturbations in the LED current during common mode transients and becomes the major source of CMRfailuresforashieldedoptocoupler.Themaindesignobjectiveofa highCMRLEDdrivecircuitbecomes keepingtheLEDintheproperstate (on or off ) during common mode transients. For example, the recommended application circuit (Figure 19),canachieve10kV/sCMRwhile minimizingcomponentcomplexity. Techniques to keep the LED in the properstatearediscussedinthenext twosections.
12
1
CLEDP
8
1
CLEDO1 CLEDP
8
2
7
2
7
CLEDO2
3
CLEDN
6
3
CLEDN
6
4
5
4
SHIELD
5
Figure 21. Optocoupler Input to Output Capacitance Model for Unshielded Optocouplers.
Figure 22. Optocoupler Input to Output Capacitance Model for Shielded Optocouplers.
HCPL-J314 fig 23
HCPL-J314 fig 22
+5 V 1
CLEDP ILEDP
8 0.1 F 7 + - VCC = 18 V
+ VSAT -
2
3
CLEDN
6
Rg
***
4
SHIELD
5
***
* THE ARROWS INDICATE THE DIRECTION OF CURRENT FLOW DURING -dVCM/dt.
+- VCM
Figure 23. Equivalent Circuit for Figure 17 During Common Mode Transient.
HCPL-J314 fig 24
1 +5 V 2
CLEDP
8
1 +5 V
CLEDP
8
7
2
7
Q1
3
CLEDN ILEDN
6
3
CLEDN
6
4
SHIELD
5
4
SHIELD
5
Figure 24. Not Recommended Open Collector Drive Circuit.
Figure 25. Recommended LED Drive Circuit for Ultra-High CMR IPM Dead Time and Propagation Delay Specifications.
HCPL-J314 fig 25
HCPL-J314 fig 26
13
CMR with the LED On (CMRH) A high CMR LED drive circuit must keep the LED on during common mode transients. This is achieved by overdrivingtheLEDcurrentbeyondtheinputthreshold so that it is not pulled below the threshold during a transient. A minimum LED current of 8 mA provides adequate margin over the maximum IFLH of 5 mA to achieve10kV/sCMR. CMR with the LED Off (CMRL) AhighCMRLEDdrivecircuitmustkeeptheLEDoff(VF VF(OFF))duringcommonmodetransients.Forexample, during a -dVCM/dt transient in Figure 23, the current flowingthroughCLEDPalsoflowsthroughtheRSATand VSATofthelogicgate.Aslongasthelowstatevoltage developedacrossthelogicgateislessthanVF(OFF)the LED will remain off and no common mode failure will occur. Theopencollectordrivecircuit,showninFigure24,can notkeeptheLEDoffduringa+dVCM/dttransient,since allthecurrentflowingthroughCLEDNmustbesupplied bytheLED,anditisnotrecommendedforapplications requiringultrahighCMR1performance.Thealternative drive circuit which like the recommended application circuit(Figure19),doesachieveultrahighCMRperformancebyshuntingtheLEDintheoffstate.
IPM Dead Time and Propagation Delay Specifications The HCPL-314J includes a Propagation Delay Difference (PDD) specification intended to help designers minimize "dead time" in their power inverter designs. Dead time is the time high and low side power transistors are off. Any overlap in Ql and Q2 conduction will result in large currents flowing through the power devices from the highvoltagetothelow-voltagemotorrails.Tominimizedead time in a given design, the turn on of LED2 should be delayed(relativetotheturnoffofLED1)sothatunder worst-caseconditions,transistorQ1hasjustturnedoff whentransistorQ2turnson,asshowninFigure26.The amount of delay necessary to achieve this condition is equaltothemaximumvalueofthepropagationdelay difference specification, PDD max, which is specified to be 500 ns over the operating temperature range of -40to100C. Delaying the LED signal by the maximum propagation delay difference ensures that the minimum dead time is zero, but it does not tell a designer what the maximum dead time will be. The maximum dead time is equivalent to the difference between the maximum and minimum propagation delay difference specification as shown in Figure 27. The maximum dead time for the HCPL-314J is 1 s (= 0.5 s - (-0.5 s)) over the operating temperature range of - 40Cto100C. NotethatthepropagationdelaysusedtocalculatePDD anddeadtimearetakenatequaltemperaturesandtest conditionssincetheoptocouplersunderconsideration are typically mounted in close proximity to each other andareswitchingidenticalIGBTs.
14
ILED1 VOUT1
Q1 ON Q1 OFF Q2 ON
VOUT2 ILED2
Q2 OFF
tPHL MAX tPLH MIN PDD* MAX = (tPHL- tPLH)MAX = tPHL MAX - tPLH MIN
*PDD = PROPAGATION DELAY DIFFERENCE NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
Figure 26. Minimum LED Skew for Zero Dead Time.
ILED1 VOUT1
HCPL-J314 fig 27
Q1 ON Q1 OFF Q2 ON
VOUT2 ILED2
Q2 OFF
tPHL MIN tPHL MAX tPLH
MIN
tPLH MAX (tPHL-tPLH) MAX PDD* MAX MAXIMUM DEAD TIME (DUE TO OPTOCOUPLER) = (tPHL MAX - tPHL MIN) + (tPLH MAX - tPLH MIN) = (tPHL MAX - tPLH MIN) - (tPHL MIN - tPLH MAX) = PDD* MAX - PDD* MIN *PDD = PROPAGATION DELAY DIFFERENCE NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
Figure 27. Waveforms for Dead Time. HCPL-J314 fig 28
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